Hi, Wolfang.
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originally posted by wpaulus@Aug 17 2006, 07:03 AM
just a guess: the nios/f has data cache.
if another avalon master changes the value of your flag in memory, the nios/f processor doesn't notice, because it loads the value from the cache.
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Good point! I've thought that declaring my on-chip memories instances as volatile, this problem couldn't happen. However, the problem is still deeper. I had already also tried to run the application under Nios/f processor without data cache (0Kb). The problem remained.
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originally posted by wpaulus@Aug 17 2006, 07:03 AM
if you load the values by using the 'ldwio' opcode, you read the value directly from memory.
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I've enjoyed your suggestion too much. Can you send me a simple example of how can I use that opcode. I don't know it yet. Or, maybe, the name of the header file where are declaring the routines I need to use. With this I suppose I can take more informations in Nios II Software Handbook.
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originally posted by wpaulus@Aug 17 2006, 07:03 AM
and depending on your optimization level, the value isn't read at all from memory, only a value in a processor register is checked. you can cirumvent this by adding 'volatile' to your variable declaration.
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I've checked my code again and, in fact, I used 'volatile' in all the declaration of the 4 shared memories.
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originally posted by wpaulus@Aug 17 2006, 07:03 AM
also, isn't there a hardware mutex component that synchorinzes access to memory between different processors?
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Yes. Actually, each memory has a mutex protecting it.
This question remembers me another doubt. What, in fact, happens when a processor try to verify the value of a variable, like in (***)? I've noticed, at least in my projects, that checking this before or after lock a mutex makes no difference. Is there no conflit among processor when trying to verify memory on this way?
Thank you to much, Wolfang. We had a good discussion here.
I'll be waiting new suggestions from Nios Community.
Regards,
Mendonça.