New ContributorCyclone5 ethernet through FPGA unstable (Kernel 4.14.130-ltsi)
Hi,
I have custom board with Cyclon5 where I route ethernet through FPGA splitter to PHY. Splitter it built by rather old Quartus 14.1. I got inspired by this example https://rocketboards.org/foswiki/Projects/CycloneVRGMIIExampleDesign
I use latest Buildroot with Busybox to build the image. Ethernet works for kernel 3.10 without any issues. Now I want to update the Kernel to 4.14.130-ltsi (https://github.com/altera-opensource/linux-socfpga/tree/socfpga-4.14.130-ltsi) and issue with ethernet emerged. If I boot up the board first time with one cable to router, everything works fine like this:
[ 2.781695] libphy: Fixed MDIO Bus: probed
[ 2.786145] tun: Universal TUN/TAP device driver, 1.6
[ 2.791586] socfpga-dwmac ff700000.ethernet: PTP uses main clock
[ 2.797909] socfpga-dwmac ff700000.ethernet: Ring mode enabled
[ 2.803750] socfpga-dwmac ff700000.ethernet: DMA HW capability register supported
[ 2.811214] socfpga-dwmac ff700000.ethernet: Enhanced/Alternate descriptors
[ 2.818170] socfpga-dwmac ff700000.ethernet: Extended descriptors not supported
[ 2.825462] socfpga-dwmac ff700000.ethernet: RX Checksum Offload Engine supported
[ 2.832926] socfpga-dwmac ff700000.ethernet: COE Type 2
[ 2.838143] socfpga-dwmac ff700000.ethernet: TX Checksum insertion supported
[ 2.855289] libphy: stmmac: probed
[ 2.858719] Micrel KSZ9021 Gigabit PHY stmmac-0:01: attached PHY driver [Micrel KSZ9021 Gigabit PHY] (mii_bus:phy_addr=stmmac-0:01, irq=POLL)
...
Starting network: udhcpc: started, v1.31.0
udhcpc: sending discover
udhcpc: sending discover
udhcpc: sending select for 192.168.2.222
udhcpc: lease of 192.168.2.222 obtained, lease time 86400
deleting routers
adding dns 192.168.2.1
OK# ethtool eth0
Settings for eth0:
Supported ports: [ TP MII ]
Supported link modes: 10baseT/Half 10baseT/Full
100baseT/Half 100baseT/Full
1000baseT/Half 1000baseT/Full
Supported pause frame use: Symmetric Receive-only
Supports auto-negotiation: Yes
Supported FEC modes: Not reported
Advertised link modes: 10baseT/Half 10baseT/Full
100baseT/Half 100baseT/Full
1000baseT/Half 1000baseT/Full
Advertised pause frame use: No
Advertised auto-negotiation: Yes
Advertised FEC modes: Not reported
Link partner advertised link modes: 10baseT/Half 10baseT/Full
100baseT/Half 100baseT/Full
Link partner advertised pause frame use: Symmetric Receive-only
Link partner advertised auto-negotiation: Yes
Link partner advertised FEC modes: Not reported
Speed: 100Mb/s
Duplex: Full
Port: MII
PHYAD: 1
Transceiver: internal
Auto-negotiation: on
Supports Wake-on: d
Wake-on: d
Current message level: 0x0000003f (63)
drv probe link timer ifdown ifup
Link detected: yesBut when I run "reboot" to soft-reboot the board, PHY is not found. Like this:
[ 2.779583] libphy: Fixed MDIO Bus: probed
[ 2.784038] tun: Universal TUN/TAP device driver, 1.6
[ 2.789496] socfpga-dwmac ff700000.ethernet: PTP uses main clock
[ 2.795803] stmmac - user ID: 0x10, Synopsys ID: 0x37
[ 2.800868] socfpga-dwmac ff700000.ethernet: Ring mode enabled
[ 2.806696] socfpga-dwmac ff700000.ethernet: DMA HW capability register supported
[ 2.814163] socfpga-dwmac ff700000.ethernet: Enhanced/Alternate descriptors
[ 2.821120] socfpga-dwmac ff700000.ethernet: Enabled extended descriptors
[ 2.827893] socfpga-dwmac ff700000.ethernet: RX Checksum Offload Engine supported
[ 2.835358] socfpga-dwmac ff700000.ethernet: COE Type 2
[ 2.840576] socfpga-dwmac ff700000.ethernet: TX Checksum insertion supported
[ 2.847619] socfpga-dwmac ff700000.ethernet: Enable RX Mitigation via HW Watchdog Timer
[ 2.862852] libphy: stmmac: probed
[ 2.866270] socfpga-dwmac ff700000.ethernet: No PHY found
[ 2.871711] socfpga-dwmac ff700000.ethernet: stmmac_dvr_probe: MDIO bus (id: 0) registration failed
[ 2.881261] stmmaceth ff700000.ethernet: PTP uses main clock
[ 2.887093] stmmaceth ff700000.ethernet: Ring mode enabled
[ 2.892589] stmmaceth ff700000.ethernet: DMA HW capability register supported
[ 2.899715] stmmaceth ff700000.ethernet: Enhanced/Alternate descriptors
[ 2.906317] stmmaceth ff700000.ethernet: Extended descriptors not supported
[ 2.913265] stmmaceth ff700000.ethernet: RX Checksum Offload Engine supported
[ 2.920384] stmmaceth ff700000.ethernet: COE Type 2
[ 2.925256] stmmaceth ff700000.ethernet: TX Checksum insertion supported
[ 2.939189] libphy: stmmac: probed
[ 2.942605] stmmaceth ff700000.ethernet: No PHY found
[ 2.947694] stmmaceth ff700000.ethernet: stmmac_dvr_probe: MDIO bus (id: 0) registration failed
...
Starting network: Waiting for interface eth0 to appear............... timeout!
run-parts: /etc/network/if-pre-up.d/wait_iface: exit status 1
FAILAlso when Ethernet is up and running and I issue "ip link set eth0 down" the board is rebooted immediately, as if watchdog would reboot the board. The same happens when I unplug the eth cable but I guess, the reason is "ip link set eth0 down" is executed by ifplugd which causing the reboot.
Last nail to the coffin appears when I plug the board to network through the switch (board -> switch -> router). Ethernet wouldn't pick the dhcp and remains unconfigured without ip.
# ethtool eth0
Settings for eth0:
Supported ports: [ TP MII ]
Supported link modes: 10baseT/Half 10baseT/Full
100baseT/Half 100baseT/Full
1000baseT/Half 1000baseT/Full
Supported pause frame use: Symmetric Receive-only
Supports auto-negotiation: Yes
Supported FEC modes: Not reported
Advertised link modes: 100baseT/Full
Advertised pause frame use: No
Advertised auto-negotiation: No
Advertised FEC modes: Not reported
Speed: 100Mb/s
Duplex: Full
Port: MII
PHYAD: 1
Transceiver: internal
Auto-negotiation: off
Supports Wake-on: d
Wake-on: d
Current message level: 0x0000003f (63)
drv probe link timer ifdown ifup
Link detected: yesI tried to lower PHY speed to 100Mb, doesn't help.
I attached the .dts file, global config and linux .config below. If you have any idea how to proceed with debugging or what is wrong, please, let me know.
Thank you.
