Here is what Altera has to say about this:
Q: The ratio of max to typical power seems higher than expected. Is that expected? Why or why not?
A: Cyclone V FPGAs, as low cost products, are optimized for lowest cost. To achieve the maximum yield, and therefore the lowest cost, Altera expands the "passing window" for maximum static power, on either side of typical power, as wide as possible during production test. This is possible without impacting Cyclone V FPGAs' low maximum static power, because of the very low typical power of Cyclone V FPGAs.
The static power should pull in as the 28nm-LP process matures but you would still need to design to the max spec.