Cyclone V FPGA-to-HPS Bridges design example bug?

I found what appears to be a bug in the example_design.c file, but didn't see a means to report it directly. So, I'm posting it here.

    for(int i=0; i<test_set->hardware_instances; i++)
    {
        test_set->bg_counters = 0;
    }

    for(int i=0; i<test_set->hardware_instances; i++)
    {
        test_set->bg_counters = 0;
    }