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Altera_Forum
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16 years ago

Custom component writing to SD-RAM

Hi fellows, i have created a system in which nios II processor is running at 100 MHZ and ddr sdram is running at 150 mhz so , i also added a clock crossing bridge, after this i created a ...
Altera_Forum's avatar
Altera_Forum
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16 years ago

Here are some other examples written in VHDL: http://www.alteraforum.com/forum/showthread.php?t=19053

The master templates up on the altera design examples page are an early version of what is used here: http://www.altera.com/support/examples/nios2/exm-modular-scatter-gather-dma.html This one is more feature rich and uses standard streaming interfaces for the control, response, and data plane interfaces so I would recommend it over the old templates.

When accessing SDRAM in general make sure you study the master access pattern. Accessing locations sequentially will give you the best performance and random accesses all over the place will give you the least performance (in general).