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Altera_Forum
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11 years ago

Custom Avalon MM-Master component that share On-chip memory with CPU

Hello all, I have a simple custom Avalon MM-Master component -- Avalon Master Sample Memory Writer library ieee; use ieee.std_logic_1164.all; use ieee.numeric_std.all; entity avalon_mem_wri...
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Altera_Forum
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11 years ago

In the "write_state", when 'waitrequest=1' you transition to "idle_state" where 'write' is de-asserted.

If this happens in your system, the write that you thought you had performed will never have been executed.