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I want to share On-chip memory used by my component with NIOS CPU but if I connect both onchip memory isn't written.
Should I connect another component (maybe an arbiter) between memory and masters or is automatically inserted?
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The arbitration logic is created automatically by Qsys.
Your problem is likely that your handling of 'waitrequest' is incorrect, but you could probably dodge the issue by making the onchip RAM dual port and connecting the NIOS to one port, and your logic to the other.
When 'waitrequest' is asserted, you need to freeze your outputs. Only when 'write=1' and 'waitrequest=0' can you consider the write transaction to have been accepted by the slave.
If you're just getting started and will be doing this for a while, I would suggest spending the time to get a good testbench using the Avalon Verification IP up and running and it will help save you time in the long run.
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