Creating sof with NIOS code embedded

So, done a bit more debugging with no success.

I have included the onchip mem instantiation info from Quartus below.

I have verified that the FPGA does in fact boot from the given .jic from power up

as I can come in with Eclipse after and download and run the .elf code.

So, problem must just be in the NIOS loading/running with the .sof/.jic used.

I have fixed this:

elf2hex my_fpga.elf --width=32 --base=0x0 --end=0x31FFF ../../my_fpga.hex

Not sure if I am calling this correctly. There are a bunch of other options/flags for elf2hex.

I am attaching the elf and output hex files. Does the hex look somewhat correct?

I noticed all the bytes are pushed to the right side far column with 0x00's everywhere

else.

I have no idea how to debug this black box and could use a hand.

Thx,

Cos

Info: Instantiated megafunction "my_fpga:my_fpga_inst|onchip_memory2_0:the_onchip_memory2_0|altsyncram:the_altsyncram" with the following parameter:

Info: Parameter "byte_size" = "8"

Info: Parameter "init_file" = "my_fpga.hex"

Info: Parameter "lpm_type" = "altsyncram"

Info: Parameter "maximum_depth" = "51200"

Info: Parameter "numwords_a" = "51200"

Info: Parameter "operation_mode" = "SINGLE_PORT"

Info: Parameter "outdata_reg_a" = "UNREGISTERED"

Info: Parameter "ram_block_type" = "AUTO"

Info: Parameter "read_during_write_mode_mixed_ports" = "DONT_CARE"

Info: Parameter "width_a" = "32"

Info: Parameter "width_byteena_a" = "4"

Info: Parameter "widthad_a" = "16"