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Altera_Forum
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10 years ago

Constraining C compiler to not make byte accesses to PCIe

The Stratix 128 bit AVMM I/F to HIP is broken for certain byte enable combinations including byte. Resulting in a malformed TLP. I have a workload in RC host memory that the NIOS II fetches and...
Altera_Forum's avatar
Altera_Forum
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10 years ago

This is the byte issue I refer to ...

Solution ID: rd04172014_563

Last Modified: May 02, 2014

Product Category: Intellectual Property

Product Area: Comm, Interface & Peripherals

Product Sub-area: Core Implementation

Version Found In: v13.1 update 4

Version Fixed In: N/A

Software: Quartus II Linux, Quartus II PC

Device Family: ARRIA V GT,ARRIA V GX,ARRIA V GZ,ARRIA V ST,ARRIA V SX,CYCLONE V GT,CYCLONE V GX,CYCLONE V ST,CYCLONE V SX,STRATIX V GS,STRATIX V GT,STRATIX V GX

IP Product: PCI Express 1/2/4/8 Lanes (x8)