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Altera_Forum
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15 years ago

Connecting an RSA-Coprocessor to a NiosII System

Hi, I designed a rsa coprocessor in Verilog which has to take inputs and put outputs directly into Memory (since arguments are quite large, about 5 or 6 and 1024 bit each). So I made the Coprocessor ...
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Altera_Forum
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15 years ago

I personally prefer to use the IORD/IOWR macros, so I guess it's a matter of taste ;) It shows in the code that you are in fact accessing some hardware and not regular memory. The macros also automatically bypass the data cache.

To answer Giorgio's question, the IORD/WR macros can handle an offset to the base address:
IORD(BASE_ADDR,0)
will read the component's first register and 
IORD(BASE_ADDR,1)
will read the second one.