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Altera_Forum's avatar
Altera_Forum
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13 years ago

Configuring TSE & Nichestack

I have Quartus&SBT 11.1, and a board with PHY 83848. I cannot bring up the eth interface with simple socket example. SOPC configuration is good (i hope), but i can't initialize the software: ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

No.

My PHY want an external oscillator (25 MHz), i'm suppling it via fpga.

I've exported a PLL output clock@25 MHz.

Anyway, i've checked with another clock source to the PHY, it still work if my sysclk PLL is set to normal mode, but it stucks when i set it to no compensation.

It seems a bug inside Altera's tools.

Ah, my external crystal oscillator feed two pll (sysclk and ddr's pll) with the same input pin, it's okay?