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Altera_Forum
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12 years ago

Configuring fpga in jtag and as mode

Hi, Iam new to altera fpga, iam using cyclone ii fpga , in datasheets it is given that, fpga can be configured in four modes(jtag,as and ps).but in evaluation schematics it is given with the on bo...
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Altera_Forum
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12 years ago

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The USB-Blaster schematic you see in the evaluation board you have (which I assume is the DE2) is a non-standard implementation of the USB-Blaster logic by Terasic. The RUN/PROG switch selects between the USB-Blaster operating in JTAG mode or AS mode, without having to move the USB-Blaster between 10-pin headers (which you cannot on this board, since the USB-Blaster is built-in).

The USB-Blaster CPLD logic is not open. You have to contact Altera for access, and I doubt that it supports this dual-mode feature.

For your custom board design, simply include the 10-pin JTAG header. You can program SPI flash devices like the EPCS configuration flash via JTAG indirect mode, so you do not need the AS header.

Cheers,

Dave

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thank u for u r support.