Honored Contributor
Honored ContributorHi Banx,
I've tried it but then my app just stops. If I do everything and move my ISR registration to the end, then it actually doesn't lock-up my program. The thing that I cannot understand is that if I read the control register using iord_altera_avalon_uart_control(uart_25_base), then it does as expected except for the interrupt enabling part. Whould you agree that the control register should read 0x0000 all the way and only after enabling the interrupts it should read 0x00C0 ?? (Note that I do NOT have Flow Control enabled in hardware) Now the result that I get is 0x0880!!! This shows that RRDY & RTS is enabled. http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/blink.gif I can't quite figure it out. The documentation says that if Flow Control is not enabled then reading this bit will always be 0. I am somewhat confused as to this. As far as your suggestion about only enabling the TX interrupt once I send and then disabling once the ringbuffer is sent, I haven't tried it yet. Why would this make a difference???? Surely the interrupts are relatively independant of each other??? The other thing that I have tried is to use the open(), read() & write() functions that seem to work fine, but I need to control the RX & TX interrupts. The reason for this is that the UARTs that I am using will be communicating with smart cards according to ISO 7816. Thanx for your help thus far! Regards, Tyrone
