Forum Discussion
Altera_Forum
Honored Contributor
15 years agoOkay, I figured out what was going on. My board has a reset circuit that holds everything in reset until the supplies are stable. However, it turns out it doesn't monitor the SDRAM supply. So I think what was happening was the FPGA would configure and start the boot loader which would then copy the software into the not-quite-ready SDRAM. I added a delay to the release of reset and now it comes up reliably.
Mark.