Forum Discussion
Altera_Forum
Honored Contributor
15 years ago --- Quote Start --- Can you tell me what your reset and exception addresses are in your NIOS CPU? My reset address points to the EPCS so that it starts at the boot loader, which seems the correct thing to do. --- Quote End --- Hi Mark My Reset address is the EPCS base address, while exception address is the base address of onchip code memory + 0x20. I use 9.0 sp2 and I was not aware of the reported bug. I used nios2-flash-programmer but I never had problems. I use compressed bitstreams, too.