Forum Discussion
Altera_Forum
Honored Contributor
15 years ago --- Quote Start --- You shouldn't call alt_dma_*tx*chan_ioctl with parameter ALT_DMA_*RX*_ONLY_OFF. I assume you have not strictly swapped all tx vs rx? --- Quote End --- The txchan has a rx and a tx side, so does the rxchan. I've created one of the following scenarios so far. DMA control register : 0xFC (normal transaction) DMA control register : 0x1FC (Read stream) DMA control register : 0x2FC (Value for write stream, but the controller 'hangs' , so it never completes.) Edit: Oh nevermind the following, you mean I don't set the write end of the Read transaction correctly (even though it works and the DMA control registers is correctly set to 1FC), I suppose:). This is what the datasheet says though: //If you are using the Avalon-MM DMA device to receive from hardware (not memory-to-memory transfer), call the alt_dma_rxchan_ioctl() function with the request argument set to ALT_DMA_RX_ONLY_ON. Hi, The stuff in my first post is for reads, that works fine as far as I know. For writes I created a new functions that is the same but with just those parameters changed. I think/thought the parameters should be set the following way, but that doesn't work. alt_dma_txchan_ioctl(txchan, ALT_DMA_SET_MODE_32, null); alt_dma_txchan_ioctl(txchan, ALT_DMA_TX_ONLY_ON, tx_data); alt_dma_txchan_ioctl(txchan, ALT_DMA_RX_ONLY_OFF, null); and alt_dma_rxchan_ioctl(rxchan, ALT_DMA_SET_MODE_32, null); alt_dma_rxchan_ioctl(rxchan, ALT_DMA_RX_ONLY_OFF, null); alt_dma_rxchan_ioctl(rxchan, ALT_DMA_TX_ONLY_OFF, null); But the DMA register just stays on no tx stream (and no rx stream).