Forum Discussion

Honored Contributor

15 years ago

Can't reset PIO edge capture using IOWR_ALTERA_AVALON_PIO_EDGE_CAP

Dear experts, I am Nios beginner. I wonder why I cannot reset the edge capture register using IOWR_ALTERA_AVALON_PIO_EDGE_CAP (to reset it inside my ISR)? //after first interrupt...

Altera_Forum

Honored Contributor

10 years ago

If the option Enable bit-clearing for edge capture register is turned off, writing any value to

the edgecapture register clears all bits in the register. Otherwise, writing a 1 to a particular bit

in the register clears only that bit.

https://www.alteraforum.com/forum/attachment.php?attachmentid=11355

Forum Discussion

Can't reset PIO edge capture using IOWR_ALTERA_AVALON_PIO_EDGE_CAP

Recent Discussions

AshlingRISCFree IDE Build system: 'source directory does not appear to contain CMakeLists.txt"

Recommended Quartus Prime Standard Edition for Nios V Development on MAX 10 FPGA (10M25DAF4817G)

Nios-V on Cyclone IV

Debug Know-How: Ashling* RiscFree* NIOS® V debug using Command Line

NIOS SDK SBOM/FOSS info