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Altera_Forum's avatar
Altera_Forum
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15 years ago

Can you tell me what NIOS processor is implemented

I am trying to get an estimate of the DMIPS of the NIOS Processor that I am using, Can anyone tell me if it is the /f /s or /e version from the system.h file? It looks like it is being clocked at 125MHz, is this correct based on the system.h file below?

/*

* CPU configuration

*

*/

# define NIOS2_BIG_ENDIAN 0# define NIOS2_BREAK_ADDR 0x41080020# define NIOS2_CPU_FREQ 125000000u# define NIOS2_CPU_ID_SIZE 1# define NIOS2_CPU_ID_VALUE 0x0# define NIOS2_CPU_IMPLEMENTATION "tiny"# define NIOS2_DATA_ADDR_WIDTH 31# define NIOS2_DCACHE_LINE_SIZE 0# define NIOS2_DCACHE_LINE_SIZE_LOG2 0# define NIOS2_DCACHE_SIZE 0# define NIOS2_EXCEPTION_ADDR 0x40008020# define NIOS2_FLUSHDA_SUPPORTED# define NIOS2_HARDWARE_DIVIDE_PRESENT 0# define NIOS2_HARDWARE_MULTIPLY_PRESENT 0# define NIOS2_HARDWARE_MULX_PRESENT 0# define NIOS2_HAS_DEBUG_CORE 1# define NIOS2_HAS_DEBUG_STUB# define NIOS2_HAS_JMPI_INSTRUCTION# define NIOS2_ICACHE_LINE_SIZE 0# define NIOS2_ICACHE_LINE_SIZE_LOG2 0# define NIOS2_ICACHE_SIZE 0# define NIOS2_INST_ADDR_WIDTH 31# define NIOS2_RESET_ADDR 0x40008000

/*

* System configuration

*

*/

# define ALT_CPU_ARCHITECTURE "altera_nios2"# define ALT_CPU_FREQ 125000000# define ALT_CPU_NAME "cpu_output"# define ALT_DEVICE_FAMILY "STRATIXIV"# define ALT_IRQ_BASE NULL# define ALT_LOG_PORT "/dev/null"# define ALT_LOG_PORT_BASE 0x0# define ALT_LOG_PORT_DEV null# define ALT_LOG_PORT_TYPE ""# define ALT_NUM_EXTERNAL_INTERRUPT_CONTROLLERS 0# define ALT_NUM_INTERNAL_INTERRUPT_CONTROLLERS 1# define ALT_NUM_INTERRUPT_CONTROLLERS 1# define ALT_STDERR "/dev/null"# define ALT_STDERR_BASE 0x0# define ALT_STDERR_DEV null# define ALT_STDERR_TYPE ""# define ALT_STDIN "/dev/null"# define ALT_STDIN_BASE 0x0# define ALT_STDIN_DEV null# define ALT_STDIN_TYPE ""# define ALT_STDOUT "/dev/null"# define ALT_STDOUT_BASE 0x0# define ALT_STDOUT_DEV null# define ALT_STDOUT_TYPE ""

Thanks

5 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    15 years ago

    I think it is indicated by the following line

    # define NIOS2_CPU_IMPLEMENTATION "tiny"

    However all documentation refers to fast, standard, and economy. What is "tiny" referring to?

    Thanks,

    John
  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    It is easier to look at the sopc builder ...

    The clocks/instruction are well defined and documented.

    However you'll need to write code very carefully in order to avoid pipeline stalls (the same will also apply to x96 processors - except that you don't normally care because they are 'fast enough').
  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    I figured that would be easier, however I do not have access to the sopc builder and need to justify the speed of my code to people that do. I understand some sequences flush the pipeline and will slow the code. I was expecting to have a 340 DMIPS processor to work with, however if my assumptions are right this implementation is a economy processor running at 37% of max frequency resulting in approximately 18 DMIPS. I was hoping I could get a confirmation or someone could point me to some documentation that defines "tiny".

    Thanks
  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    That's the 'e' core. Each instruction takes multiple clock cycles to complete without any pipelining so that will result in a low Dhyrstone score. The 'e' core also doesn't have any cache memory.

  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    Thanks BadOmen, thats exactly what I was looking for. That explains the results that are about 20 times slower than my initial guess at the speed I could achieve.