Can Nios be synthesized by Synplify or Amplify

The SOPC builder outputs vhdl/verilog files and memory initialization files (mif/hex) so I don't see why not (never done it, I just use Quartus for altera FPGAs).

But to use the SOPC builder you have to have Quartus installed.

So as long as you can get the block it generates into those programs you're fine (never used Amplify before, and everything I did in Synplify was VHDL (using that other FPGA company hehe) so I can't be 100% sure (but if it doesn't handle block stuff you could do some vhdl to map the I/O anyway))

G-luck