Altera_Forum
Honored Contributor
14 years agoCan I use 8M sdram for nios2-mmu linux?
hello,
I have a custom fpga board with a ep2c20 core, a 8M cfi flash chip, a 8M sdram chip, etc.I design a smallest nios2 sopc with just a sdram controller, uart jtag and nios2-mmu with dual port on-chip memory, here are my dts info: see the 2c20_dts.txt attachment. here are my kernel configuration see the linux_config.txt attachment. It stucked in diffrent ways when I chose diffrent slab allocator, see the result for detail: 1.slab:
Linux version 3.1.0-rc4-01162-g45c9dd8 (liunx@gentoo) (gcc version 4.1.2)# 13 Fri Oct 7 14:12:07 CST 2011
bootconsole enabled
early_console initialized at 0xe0000420
On node 0 totalpages: 8192
free_area_init_node: node 0, pgdat c132a2ac, node_mem_map c13387a0
DMA zone: 64 pages used for memmap
DMA zone: 0 pages reserved
DMA zone: 8128 pages, LIFO batch:0
pcpu-alloc: s0 r0 d32768 u32768 alloc=1*32768
pcpu-alloc: 0
Built 1 zonelists in Zone order, mobility grouping on. Total pages: 8128
Kernel command line: bootargs="debug console=ttyJ0,115200"
PID hash table entries: 128 (order: -3, 512 bytes)
Dentry cache hash table entries: 4096 (order: 2, 16384 bytes)
Inode-cache hash table entries: 2048 (order: 1, 8192 bytes)
Memory available: 29152k/3289k RAM (1017k kernel code, 2271k data)
BUG: failure at /home/liunx/Work/Fpga/nios2-linux/linux-2.6/mm/slab.c:3111/cache_alloc_refill()!
Kernel panic - not syncing: BUG!
2.slob
PID hash table entries: 128 (order: -3, 512 bytes)
Dentry cache hash table entries: 4096 (order: 2, 16384 bytes)
Inode-cache hash table entries: 2048 (order: 1, 8192 bytes)
Memory available: 29160k/3281k RAM (1011k kernel code, 2269k data)
NR_IRQS:32
The slob may work for my board, I traced the slob one, it stuck during the eary_irq_init() loop, I guess that may be the size of sdram is not fit the kernel's demand? And how many memory the kernel need with mmu support?:(