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Altera_Forum
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10 years ago

Can I connect c0 and c1 from ALTPLL directly to pins in MAX10?

Hi all, I'm want to test the PLL outputs for a nios system in a MAX10 fpga. I was told in another thread that I needed to add a clock bridge to simultaneously connect the output (c0 or c1) inte...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

It worked!!!!! I tried again and this time I unchecked all boxes for extra pins and didn't export them. Qsys gave me warnings about it but I ignored them. I set the c0 and c1 outputs really low to start (5kHz) and gradually tried higher and higher. The square wave doesn't look like a squarewave at 50MHz but at least it is there. Now I can move on to using it with an SDRAM. I'm pretty sure I'll be posting some questions when/if I get stuck. Thank you!.