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Altera_Forum
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20 years ago

cal_uart(with fifo) + NIOSserial.c

As we know, we need uart with fifo to enchance the performance. So we got the cal_uart from Altera, which should tested by ourselves because it is not provided officially by altera.

Now we use cal_uart with 16 byte rx_fifo, 16 byte tx_fifo. We hope the fifo is transparent to linux driver, so the linux driver is still NIOSserial.c, which we changed nothing. But we got :

0. U-boot access the UART sucessful during rx, tx. We think U-boot using pool methed. Is it right?

1. tx data is successful

2. rx data is abnormal. After linux startup, linux will reboot immediately after we receive any data by cal_uart.

3. We try to debug NIOSserial.c using printk . Is it right way to debug in UART driver?

thank u in advance.

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  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    20 years ago

    --- Quote Start ---

    originally posted by mountain8848@Mar 1 2006, 01:27 AM

    we tested the cal_uart's irq signal is only active for 1 clock period so

    i changed

    <cal_uart>/uart_pm.pl[/b]:L1933:rx_char_ready to rx_not_empty

    in order to

    irq <= ... rx_not_empty ...

    then it worked well.

    <div align='right'><{post_snapback}> (index.php?act=findpost&pid=13014)

    --- Quote End ---

    [/b]

    --- Quote End ---

    Hi,

    I am trying to use cal_uart with uClinux.

    Tx works fine but linux crashes in Rx .... I tried to do the correction specified above ...but i could not find the file uart_pm.pl.

    But there is a file em_uart.pl ....is this the same file to do the correcton ?

    this is line 1933 from uart_pm.pl

    "(ie_rx_char_ready && rx_char_ready )",

    do i have to change both ie_rx_char_ready and rx_char_ready ?

    thanks in advance,

    Vishal