C2H fixed point mpy

Don't know if this is a real bug. An older VHDL based design required a speedup in the data resampling code. Since I have the C2H license I decided to implement the function that way. One way to fit a large number of polyphase resampling filters into onchip_mem is to read half of them in reverse order, which reduces the number of filters required by one half.

My first attempt, which works fine using software, compiled okay but produced invalid results.

 
// Resample data vector with polyphase filter
// r is input data pointer, p is polyphase filter pointer
int ReSample(int* __restrict__ r, int* __restrict__ p, alt_u16 PolySel)
{
  # pragma altera_accelerate connect_variable ReSample/r to sdram
  # pragma altera_accelerate connect_variable ReSample/p to onchip_mem
    long long SumVal = 0;
    char flag = (PolySel & 0x100)>>8; // MS bit determines coeff direction
    int k = 20;
    do {
        SumVal += (long long)*r++ * (long long)*p ;
        (flag) ? p-- : p++ ;  // scan reverse or forward
     } while (--k);
     return (int)(SumVal >> 22);
}

After some testing I determined that the filter pointer p was not being incremented or decremented. Experimenting with workaround code finally reulted with a version that operates properly and generates the same result as software.

 
    do {
        SumVal += (long long)*r++ * (long long)*p ;
        if (flag) p-- ;  // scan reverse
        else p++ ;        // scan forward     
     } while (--k);

I have not had a chance to check this with a verilog design or any other hardware so I don't know how solid this is.

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(edit) This is explained in http://www.altera.com/literature/rn/rn_nios2eds.pdf

"The C2H Compiler always evaluates both operands of logical (&&, ||) and

conditional (?:) operators."

So the ? conditional result is both increment and decrement, no change.

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