BSP Generation Error

Any updates on this error/issue ?? Kindly help in case if you are familiar

I am not sure regarding the interface of nios-sram output and actual pins of the sram

i get the following from nios-sram

address[15..0]

be_n[1..0]

data[15..0]

read_n

write_n

select_n

i am connecting them to the following on sram (CY7C09289)

address[15..0] - address[15..0]

be_n[0] - lb_n

be_n[1] - ub_n

data[15..0] - data[15..0]

read_n - oe_n

write_n - r/w_n

select_n - ce0_n

NOT(select_n) - ce1

i am not sure how to connect the CNTEN_N, CNTRST_N, ADS_N signals !!

based on the datasheet i am connecting them as (Address load to address register)

CNTEN_N - XX (Dont care)

CNTRST_N - HIGH

ADS_N - LOW

I compile the quartus and flash the quartus code in JTAG, its fine

When i try to run NIOS HARDWARE, I am still getting the error i have mentioned earlier -

"Downloading ELF process failed" - the address location points to the SRAM !

Please help at the earliest !!!! Thanks in advance

I have attached the Cypress SRAM datasheet - i am using one port of the SRAM only