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Altera_Forum
Honored Contributor
12 years agoThe 'EPCS rom' is just a hidden block of internal memory at the bottom of the epcs block.
The normal bootloader is position-independant code (PIC) and knows that the registers are at a fixed offset from the code. If you are compiling the code for a known address it doesn't need to be PIC. You ought to be able to debug it loaded at an alternate address provided that you change the code so that it can find the epcs registers. Alternatively it should be possible to load the code as part of the fpga image and then debug it via jtag - by getting the jtag debugger to jump to its entry point (the base address). Just make sure that it isn't actually writing over any other code that is actually running.