Hello, has anyone managed to boot the whole u-boot image (Bootloader) from FPGA? If so, how did you do this? There are tutorials for booting the HPS from FPGA with U-Boot SPL. The tutorials use the FPGA On-Chip Memory for just the Preloader and they load the actual Bootloader from SD-card or QSPI Flash. We have custom board with just blank eMMC-memory, EPCQ256 and Cyclone V SoC-device. I guess that it's possible to load the bootloader also from FPGA, but I haven't found any information about this. We would like to boot the U-Boot from the FPGA and then write the actual OS-image to eMMC-memory using Ethernet. Thanks, Joonas

You are right, I've not seen an example that does that - my guess is that the internal memory are probably too "precious" to be allocated for the whole bootloader. Technically though I don't see any limitation in doing so - except that you've to probably have to modify spl.c to point to the next offset that is located over the H2F bridge.

--- Quote Start --- You are right, I've not seen an example that does that - my guess is that the internal memory are probably too "precious" to be allocated for the whole bootloader. Technically though I don't see any limitation in doing so - except that you've to probably have to modify spl.c to point to the next offset that is located over the H2F bridge. --- Quote End --- The actual U-Boot's size is 1553 Kbytes, so that doesn't fit into our device's On-Chip memory. Would it be possible to add Ethernet support to the U-Boot SPL? Or to use the UEFI bootloader? Arria 10 seems to support the UEFI bootloader. Is there support also for Cyclone V?

I don't think it is possible to add Ethernet to the SPL - reason being, the small code size is meant for the HPS on chip RAM (64KB). Arria 10 meanwhile has much larger OCRAM at 256KB. Yes, A10 support UEFI but CV does not. The other bootloader that Altera provides for CV is the MPL.

--- Quote Start --- I don't think it is possible to add Ethernet to the SPL - reason being, the small code size is meant for the HPS on chip RAM (64KB). Arria 10 meanwhile has much larger OCRAM at 256KB. Yes, A10 support UEFI but CV does not. The other bootloader that Altera provides for CV is the MPL. --- Quote End --- Okay, A10 seems to have much better options :cool: Would it be possible to place the u-boot binary in the EPCQ-flash and then using the boot copier load the u-boot binary into the DDR-memory? Is there support in EDS-tools for the boot copier? NIOS II SBT seems to have this nice feature.

Ok, if I got you correctly: device powers up --> FPGA complete programming --> HPS loads SPL from on chip memory --> SPL sets up HPS clocks, and readies the HPS DDR --> bootcopier/SPL copies uboot into HPS DDR --> HPS executes from DDR :huh: I don't really know, but (1) the HPS DDR needs to be set up by SPL before the FPGA (boot copier) can access them, so this can't be done immediately after FPGA completes programming and the F2S bridges are enabled (2) SPL probably is not able to control the EPCQ controller to read/write data. Either way, this is probably way beyond my expertise :) I suggest you try contacting Altera support for this.

Booting HPS from FPGA | Altera Community

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Altera_Forum
Honored Contributor
7 years ago
--- Quote Start ---
Thanks for your sharing :)
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I have exactly the same issue as this. I only have an eMMC memory on my board which is soldered down blank and I need to partition and program it with the full bootloader and Linux. This can be done from Linux but first I must boot into uboot so I can access my USB port and then boot into Linux.
We have managed to do this from the DS5 debugger but it is not easy. I have also managed to boot the preloader from the FPGA but can't find the next step to boot preloader and uboot from the FPGA. It is possible to fit both preloader and uboot into the FPGA on chip memory but I need to know how to modify the preloader to make it point to the uboot image in the FPGA memory 0xC0040000 and how to convert the u-boot.bin to a ".hex" so I can add it to the FPGA on board memory initialisation file.
We are using Cyclone V SOC and used AN709_SOC_boot_guide.

Thanks
Stuart

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Booting HPS from FPGA

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