If your cfi flash is connected via an avalon tri state bridge then this bridge arbitrates the access of different masters. Meaning you can let different masters access this flash as it is a slave to avalon at the same time. Only one of them will gain access, the others must wait.
So all nios masters could start to run from this flash at the same time
Also you could add other masters like dma or your custum ip to gain access to a slave. All arbitration is handled via avalon and you setup special behavioral via sopc builder, see altera documentation
But you must take care about the following.
If one master alternates the cfi you must enshure that no other master accesses this cfi as this would disturb the programming algorithm, so have a look at the datesheet of your cfi
In your application with external cfi flash as boot medium all nios reset pointers can point to the same slave, even to the same reset adress and start at the same time. In fact the avalon bridge will multilex the access. This is very well documented by altera avalon specification.
You must take about caches, but you are aware of that already.
It would also be possible to share slaves like sdram between the different nios.