Dear Michael,
Thankyou so much for your very informative and detailed response. I still am a bit unlcear about something. We plan on using this external flash memory to store quite a few things. We will be running a number of processors (3+) simultaneously that may need to access this external flash for booting of firnmware and also retrieving and writing data. Also we may require data transferred from an external source to the flash device at the same time ! Won't we need some sort of arbitration device - like a MUTEX ? It could be that we might need to reset the CPU's at differnet times that may require rebooting of their firmware - will the MUTEX core handle this type of arbitration or are we going to have to incorporate an external handshake logic on the resets to the CPUs ? We did this for a previous design where we were booting a multi-core design from an EPCS. We needed to load indentical code to both processors. We had to design some complex external logic to control the system of resets so that the reset and download of one firmware would not clobber the 2nd CPUs download of firmware !?
Thanks
Shmuel