Forum Discussion
Altera_Forum
Honored Contributor
9 years agoTo run different programs on the cores, there is no need to have core# 0 to load the program for core# 1.
The memory is shared between both cores, and if the cache is not set for non-shared, both processors see the same memory. Upon reset, core# 0 is allowed to run and core# 1 remains under reset. There is a short sequence to perform with core# 0 to inform core# 1 where to start executing and to release it from reset. We have a version of our SMP RTOS available as freeware. There is a demo in that free package showing how to do bare-metal using both cores. You can download it from: www.code-time.com Regards