Forum Discussion
Altera_Forum
Honored Contributor
Honored Contributorboot NIOS from EPCS flash and use SDRAM to store instructions and data
Hi! In the qsys I have: 1. Clock Source 2. On-Chip Memory 3. Nios II Processor 4. System ID 5. JTAG UART 6. EPCS Serial Flash Controller 7. PIO 8. SDRAM Controller I want to use...
Altera_ForumHonored Contributor
Honored ContributorI mapped all sections to on-chip memory, rebuild project and from Flash Programmer write *.elf to EPCS. After that my system boot from EPCS, I can see it from Signal Tap Logic Analyzer. There is a PIO-out, which say me, that NIOS is working (and signals of two sgdma). When I mapped all of sections to SDRAM, this signal is always zero (and signals of sgdma too).
