Forum Discussion
Altera_Forum
Honored Contributor
13 years agoI mapped all sections to on-chip memory, rebuild project and from Flash Programmer write *.elf to EPCS. After that my system boot from EPCS, I can see it from Signal Tap Logic Analyzer. There is a PIO-out, which say me, that NIOS is working (and signals of two sgdma). When I mapped all of sections to SDRAM, this signal is always zero (and signals of sgdma too).