Forum Discussion
Altera_Forum
Honored Contributor
10 years ago --- Quote Start --- Ok Daixiwen, thank you. You said in one post that serial flash can't be accessed with IOWR/IORD macros /* write to flash 32 bits at a time */ IOWR_32DIRECT(epcq_flash_info->data_base, write_offset, word_to_write); But, even if I use the alt_write_flash / alt_read_flash functions, the alt_epcq_controller_write_block/ alt_epcq_controller_read functions are called by the first one. And so IOWR/IORD macros. It's normal ? --- Quote End --- The IORD/IOWR macros are used for direct memory mapped access. If you had a parallel flash that was connected with the usual address/data busses, you could directly access its contents with those macros and the parameters (base, offset, word) as you suggest, and it would work. But the EPCS flash is a serial chip, accessed through SPI. You need to send it an SPI command with the offset you want to read/write first, and then you can access the data with more SPI transactions. The alt_read_flash and alt_write_flash functions use a bunch of IORD/IOWR macros, but they are to talk to the SPI master, not directly to the flash. --- Quote Start --- Also I would like to explain you a situation that debug mode gives me. The written data is 0x3fe3d70a. 3f e3 d7 0a - written data 0a d7 e3 3f - endian swapped 9f f1 6b 05 - it's like right shifted (when write in the memory) 0x9ff16b05>1 = 3FE2D60A 0x04800000 : 0x4800000 <Hex> Address 0 - 3 4 - 7 8 - B C - F 04FB0000 056BF19F FFFFFFFF FFFFFFFF FFFFFFFF 04FB0010 FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF 04FB0020 FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF the data is being endian swapped first then shifted right between the time it is written and when its read, which means somewhere there are an incorrect number of serial shifts to load all the data being written or read back. How can I looking at the serial lines with signaltap ? I didn't find them in my entity. Best regards --- Quote End --- The pins are hidden because Quartus directly connects them, but now that you mention it I don't know if/how you can access them within Signaltap. Maybe have a look inside the EPCS controller? There should be a SPI master with the chip select, clock and data signals somewhere. The fact that the data seems to be shifted is interesting.... Is it a custom board or a development kit? It could be a good idea to use a scope instead of Signaltap and check the quality of the signals to the EPCS. Pay special attention to the clock signal, if you have some ringing the EPCS could hop over some data bits when it is accessed.