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Altera_Forum
Honored Contributor
11 years agoboot NIOS and FPGA from EPCS flash
Hi all, I am having problems booting up my Nios C code from EPCS. I am building my own FPGA board, not using a demo board. I'm using Quartus 15.0 and DE0 NanoBoard( Cyclone IV as FPGA) My app...
Altera_Forum
Honored Contributor
11 years agoWhen you generate the jic file you should have an output.jic and an output.map file created. Check the output.map file it will tell you the EPCS addresses of the sof and hex files. Make sure the hex file starts right after the sof file. So if the address range of the sof is 0x000 - 0xAAA, the the hex file should start with 0xAAB.