Basic SDRAM/NIOS question

--- Quote Start ---

originally posted by fpgazz@Apr 14 2005, 01:11 PM

hello:

i'm new here. here's a fairly basic question (i think)... an answer to which i have been unable to find.

i have a nios2 cyclone development board. what i want to do is read data from sdram (14 bits at a time) and clock it into a dac using the pio core.

my question is this... let's say i want to clock these 14 bit values into the dac at a rate of 5 mhz (the clock would have to be generated from the fpga as well... possibly sysclk divided down). but here's the problem- how do i write these 14 bits to the pio pins at a fixed rate so as to follow the timing constraints of the dac chip? is it a difficult task to do this with sdram?

or should i just do a dma to sram and control that using my own design outside of nios.

thanks in advance.

--

--- Quote End ---

i think you'd better develop a user register slave,the nios only write the dac datas into it,then it can write the datas at 5MHZ to your dac.