Forum Discussion
Manprocoder
New Contributor
1 year agoAXI4 DMA Master Error
Hi expert, I am building SoC system that includes components as follows: + CPU + onchip_memory_2_0 + onchip_memory_2_1 (source address) + onchip_memory_2_2 (destination address) + IP (Active As...
ScottW_Altera
New Contributor
1 year agoThanks for the details @Manprocoder.
From what I can see the platform design looks OK and the NIOS appears to be doing what it should to initialize the DMA so I would conclude the problem is likely to be with the active_ascon IP. I will see if I can get someone from the AXI team to take a look and give some guidance. It will likely require sharing more information about the active_ascon IP block.