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Altera_Forum
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13 years ago

Avalon MM Slave Query

Hey Everyone, For a university project I'm trying to implement a custom hardware block to help accelerate the calculation of the determinant of a matrix. We're using Quartus V12, and a Ter...
Altera_Forum's avatar
Altera_Forum
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13 years ago

No there shouldn't be any offset between the read and write addresses. Could you share your HDL code? I don't really get what you are saying here:

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We've implemented this Avalon Memory Mapped Slave (google "avalon slave interface block" I'm not allowed to post links yet") into our NIOS block in Qsys with only 10 registers, due to 16 giving us naming convention errors, but have solved by editing the tcl file.

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What kind of naming convention errors, and what did you need to edit in the tcl file? Creating a component with 16 registers shouldn't be a problem.