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Altera_Forum
Honored Contributor
10 years agoAvalon MM slave and interrupt
Hi folks,
I have written an Avalon Slave peripheral to interface to an FTDI chip. I this peripheral I have inlcuded an IRQ signal that is driven from the FTDI chip. However when I add this peripheral to Qysys and make all the necessary connections (including setting an IRQ number) I get some warnings and errors on generation. Namely that the irq sender is not connected to a receiver, but yet in the messages box at the bottom of Qsys it says 0 errors, 0 warnings. http://www.alteraforum.com/forum/attachment.php?attachmentid=11972&stc=1 I have included the warnings and errors I get on generation above. Can anybody give me an idea of where I am going wrong? Many thanks deBoogle3 Replies
- Altera_Forum
Honored Contributor
Could you include your hw.tcl for your Avalon Slave? I want to take a quick look if you don't mind.
- Altera_Forum
Honored Contributor
I have attached the tcl file (renamed as .txt as the uploader complained at me!!).
Many thanks for taking the time to have alook for me. deBoogle - Altera_Forum
Honored Contributor
For starters, is the add fileset file and path correct?:
add_fileset QUARTUS_SYNTH QUARTUS_SYNTH "" "" set_fileset_property QUARTUS_SYNTH TOP_LEVEL FT245_Avalon_Interface_RW set_fileset_property QUARTUS_SYNTH ENABLE_RELATIVE_INCLUDE_PATHS false add_fileset_file "FT245_avalon_interface RW.vhd" VHDL PATH "../Avalon/FT245_avalon_interface RW.vhd" TOP_LEVEL_FILE Probably you may want to rename for consistency.