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Altera_Forum
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21 years ago

Avalon_bus_to_extenal_controller

As i am a newbie with sopc, i do not understand very well how to interface Altera peripheral (Avalon slave interface) with an external 16 bits microcontroller (the real master). I do not want to impl...
Altera_Forum's avatar
Altera_Forum
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21 years ago

i have a similar problem ,i want generate a double accessed ram in FPGA,with one side communicating with niosII cpu and the other side communicating with dsp out of FPGA,but i dont know how to make it. you know,each side of the double accessed ram is slave port,when i generate it in sopc buider,the two sides all connect with niosII cpu. i have no idea about it. do you have solved your problem, if you do,maybe you will give me some idea.