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Altera_Forum
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20 years ago

Avalon_bus_to_extenal_controller

As i am a newbie with sopc, i do not understand very well how to interface Altera peripheral (Avalon slave interface) with an external 16 bits microcontroller (the real master). I do not want to impl...
Altera_Forum's avatar
Altera_Forum
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20 years ago

Well, the on board cpu is a 16 bit microcontroller. The idea is to make a bridge wich will transform the external cpu timing to an avalon compatible timing.

Into the fpga will be only avalon slave functions (uart, dp_ram, state sequencer...). Our application do not need a 32 bit processor, but a deterministic timing. The FPGA will act as a peripheral (i.e. co-processing).

Do somebody have made a similar bus (i only found large buses as AHB, EMIF) bridge?

Best regards.

Jacques Paris