Honored Contributor
Honored Contributor*Do not* use a burst count of 0, you'll probably lock up the arbitration logic of whatever slave is being accessed.
kbs972 explained the difference quite well. An extra little bit of information: If you define a burstcount bus of (n-1)..0 the maximum burst value you are allowed to present is 2^(n-1). So for example if I had a burst count signal of 5 bits wide, the maximum value I'm allowed to post is 16 (10000 in binary). In other words the maximum value you can post on the burst count signal is the MSB set to '1' and all other bits set to '0'. In your example of a burstcount width of 10 that means the maximum burst you can present is 2^(10-1) = 512 beats. I have not seen anything that used a burst count exceeding a max burst count of 128 (burst count width of 8 bits). Also when possible try to match the master and slave burst max burst counts and data widths, this will help avoid burst adapters. Some other useful burst information can be found in here: http://www.altera.com/literature/hb/nios2/edh_ed51007.pdf
