Ask for help on driver code on Altera platform

Hi, I have fixed this issue with the help from Ian Abbott, thanks Ian and thanks for your concern, I paste his message here:

Make sure you are reading a non-cached address. For nios2-nommu,

non-cached addresses have bit 31 set to 1, and bits 30 to 0 are the same

as the cached address. As a quick test, try replacing FPGA_BLOCK_ADDR

with (FPGA_BLOCK_ADDR | 0x80000000).

For portability, it's better to call ioremap() or ioremap_nocache() in

your device probe() function to convert the physical base address of

your device registers to a pointer to be stored in your private device

structure, and to use readb(), readw(), readl(), writeb(), writew(),

writel() (or ioread8(), etc.). to access these registers instead of

accessing them directly with the '*' operator.

For nios2-nommu, ioremap() merely returns its parameter with bit 31 set

to 1, and readb() etc. just access the I/O memory directly like your

code does.