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Altera_Forum
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10 years ago

Arrow Cyclone V SoCKit Hard DDR3 Memory controller interface

Hello all, I have a query with respect to the implementation of the Hard Memory controller + UniPHY interface for the Cyclone V SoCKIT development board (https://www.arrow.com/en/products/so......
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

Hi David,

I have done exactly what you said and the HMC worked fine in the SoCKit. Also, I left the memory clock frequency at 300MHz even though the Cyclone V's HMC is supposed to handle up to 400MHz.

Try that configuration and use the External Memory Interface Toolkit to confirm it is working properly.

Best regards,

Thiago