Forum Discussion
Altera_Forum
Honored Contributor
21 years agoThanks for your reply,
I know that the HAL code is not the FLASH Programmer code, but both must work for our system. I updated to Quartus 4.2 and NIOS 1.1 I converted a project and got the following result - SOPC Builder generated,Quartus compiled without problem - software compiled (small change: did not recognized "#include<sys\ioctl.h" changed to "#include<sys/ioctl.h" - NIOS Flash Programmer from IDE makes a lot of trouble - NIOS Flash Programmer from shell script works with AMD FLASH AM29LV065DU-120REI - NIOS Flash Programmer from shell script does not work with AMD FLASH S29GL064M11TAIR0 additional to the flash problem, I have the following problem - SOME USER INTERFACE LOGIC DOES NOT WORK AS EXPECTED when I iopen the flash programmer from the ide ,I always get the message: "There is a problem with the target board. Check the target board selection in SOPC Builder for this system" after closing IDE, opening Quartus, opening SOPC Builder, closing SOPC-Builder, opening IDE again (! no changes, just open and close)), sometimes everything is ok and I can start the flash programmer. (I had this problem several times with NIOS 1.0, but now it got worsened) when I can start FLASH Programmer, I get the folowing message: -------------------------------------------------------------------------------- # ! /bin/sh# # This file was automatically generated by the Nios II IDE Flash Programmer.# # It will be overwritten when the flash programmer options change.# cd I:/12DXI02_SOFTWARE/te1_01/Debug # Creating .flash file for the FPGA configuration $SOPC_KIT_NIOS2/bin/sof2flash --flash=D5 --offset=0x00700000 --input=I:/12DXI02_ FPGA/standard.sof --output=standard.flash Info: ******************************************************************* Info: Running Quartus II Convert_programming_file Info: Command: quartus_cpf --no_banner --convert I:/12DXI02_FPGA/standard.sof st andard.rbf Info: Quartus II Convert_programming_file was successful. 0 errors, 0 warnings Info: Processing ended: Fri Jan 14 20:47:20 2005 Info: Elapsed time: 00:00:00 # Programming flash with the FPGA configuration $SOPC_KIT_NIOS2/bin/nios2-flash-programmer --input=standard.flash --sof=/system/ BOARD_12DIXI02.sof --cable='USB-Blaster [USB-0]' --base=0x00800000 14.01.2005 20:47:22 - (INFO) nios2-flash-programmer: Launching Quartus Programme r to download: /system/BOARD_12DIXI02.sof Error: Can't locate programming file BOARD_12DIXI02.sof (/system/;) in Chain Des cription File 14.01.2005 20:47:24 - (SCHWERWIEGEND) nios2-flash-programmer: Unable to download SOF: /system/BOARD_12DIXI02.sof, exiting # Creating .flash file for the project $SOPC_KIT_NIOS2/bin/elf2flash --flash=D5 --base=0x00000000 --end=0x800000 --rese t=0x0 --input=te1_01.elf --output=ext_flash.flash --boot=$SOPC_KIT_NIOS2/compone nts/altera_nios2/boot_loader_cfi.srec # Programming flash with the project $SOPC_KIT_NIOS2/bin/nios2-flash-programmer --input=ext_flash.flash --sof=__NO_SO F_PLEASE__ --cable='USB-Blaster [USB-0]' --base=0x00800000 14.01.2005 20:47:26 - (INFO) nios2-flash-programmer: SOF-download skipped. 14.01.2005 20:47:27 - (SCHWERWIEGEND) nios2-flash-programmer: Error opening targ et hardware jtag_atlantic connection failed to open: There are no JTAG UARTs available which match the --device and --instance options you provided. 14.01.2005 20:47:27 - (SCHWERWIEGEND) nios2-flash-programmer: In order to program flash, you must first create a purpose-built flash-programming design (i.e. FPGA configuration) and associate it with your particular board. The Nios development kit is delivered with purpose-bui lt flash-programming designs pre-built for several development boards. If you wi sh to program flash on your own board, you must first create a flash-programming design. The process of creating a flash-programming design for your board is mostly automated. From a bash-shell, execute this script: mk_target_board --help The help-message includes references to other documentation on programming flash and targeting Nios systems to custom board designs. - exiting. -------------------------------------------------------------------------------- the following is the output from the flash programmer for AMD FLASH S29GL064M11TAIR0 (shell script) ---------------------------------------------------------------------------- COPY FILE : standard.SOF `../12DXI02_FPGA/standard.SOF' -> `standard.SOF' ---------------------------------------------------------------------------- CONVERT FILE : standard.SOF to : standard.FLASH FLASH ID : U1 OFFSET : 0x00700000 ---------------------------------------------------------------------------- 14.01.2005 21:03:19 - (FEIN) sof2flash: Starting Info: ******************************************************************* Info: Running Quartus II Convert_programming_file Info: Command: quartus_cpf --no_banner --convert standard.SOF standard.rbf Info: Quartus II Convert_programming_file was successful. 0 errors, 0 warnings Info: Processing ended: Fri Jan 14 21:03:20 2005 Info: Elapsed time: 00:00:01 14.01.2005 21:03:20 - (FEIN) sof2flash: Done PRG:standard.flash ---------------------------------------------------------------------------- PROGRAM FILE : standard.flash BOARD FILE : BOARD_12DIXI02.sof CABLE : USB-Blaster [USB-0] JTAG-DEVICE : 2 FLASHPRG BASE ADD : 0x00800000 ---------------------------------------------------------------------------- 14.01.2005 21:03:21 - (INFO) nios2-flash-programmer: Launching Quartus Programmer to download: BOARD_12DIXI02.sof Pre-Reading 283KBytes of data from U1: |----.----+----.----| ********************* (2.36 sec). Erasing 5 Sectors: |----.----+----.----| ********************* (4.406 sec). Writing 320KBytes : |----.----+----.----| **14.01.2005 21:03:42 - (SCHWERWIEGEND) nios2-flash-programmer: Unable to write to flash 14.01.2005 21:03:42 - (SCHWERWIEGEND) nios2-flash-programmer: Error: Write-operation failed on device. - exiting. --- !!! ERROR !!! !!! ERROR !!! !!! ERROR !!! !!! ERROR !!! --- FEHLER PROGRAMMIERUNG First I need help with the flash programmer, I will post some info with the problem with user logic when i have more test results thanks