Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

altmemphy issue

Hi all, we are working with our PCB and our FPGA system include a Nios, onchip memory,DDR2 controller altmemphy and jtag UART. The problem is that you have verification error when we download N...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

Hi Giuseppe,

I had designed a similar system with Nios, DDR2 controller altmemphy, JTAG UART, but without a on-chip memory. Both data and instruction memory is located in DDR2. (Cyclone III, MT47H DDR2 IC)

I came to know that exception,reset vectors will be stored in the first few address blocks of the DDR2 and then we can write and read the data from further addresses, is this true?

What is the command to write and read the memory with a Nios-II processor?

I know this is not related to verification error,sorry.

Thank you for sharing your experience

Regards,

Sriram.