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Altera_Forum
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10 years ago

Altera JTAG UART used by kernel does not match IRQ assignment made in Qsys

Hi all, I'm currently developing a 3.10.31-ltsi kernel that running on a Nios II-based system. This system also contains several components including an Altera JTAG UART, USB host controller a...
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Altera_Forum
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10 years ago

Hi Bhaumik,

I'm still a little confused. Didn't you say in an earlier post that you were using IRQ 0 for the timer?

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We did above only to notice effect of interrupt number assigned in DTS to jtaguart and how it is actually selected during build. This is for system in which Timer is at IRQ 0, JTAG is at 1 and Host Controller is at 2. This is little bit different than yours. But in this, we are getting same problem.

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From the output from your "cat /proc/interrupts" it appears that the timer is actually using IRQ 1. Is that correct or have you actually set the timer to use IRQ 1 in Qys and the associated .dts file?

I look forward to your response.

- Brad