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SDavi9's avatar
SDavi9
Icon for Occasional Contributor rankOccasional Contributor
7 months ago
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Agilex™ 5 FPGA E development Kit NIOS Design

Is there a development kit design, preferably in VHDL, for the Agilex™ 5 FPGA E development Kit that implements a NIOS II Tx and Rx using the FMC connector and an external optical device ?
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  • tehjingy_Altera's avatar
    tehjingy_Altera
    7 months ago

    Hi


    Yes, the top levels are in VHDL.

    They are just simple connection for the Nios V Processor.


    Regards

    Jingyang, Teh


tehjingy_Altera's avatar
tehjingy_Altera
Icon for Regular Contributor rankRegular Contributor
7 months ago

Hi


I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, Please login to ‘https://supporttickets.intel.com/s/?language=en_US’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.


Regards

Jingyang, Teh