from nios side of view there is no difference if the target memory is 8 16 or 32 bit wide.
the translation is handled by the avalon switch fabric. even if you copy from an 8 bit target to a 16 bit target.
a 32 bit master is capable of fetching 4x the data as an 8 bit master in 1 clock cycle. thus does not need to address the memory 4 times.
they other way round, if you connect an external 8 bit memory and an 32 bit memory to your fpga, then you must connect the 8bit slaves lowest addressignal to the fpga lowest addressignal lets call this call tristate_bus_a[..] where the lowest signal is tristate_bus_a[0] and is connected to 8bitmemory_a[0]. but the 32bit memory ist connected differently 32bitmemory_a[0] goes to tristate_bus_a[2]