Hello again,
I am trying to setup the ACP port, so I have some questions:
1. Do I need to use the FPGA to HPS port instead the FPGA to SDRAM ports?
2. Do I need to cast the buffer I allocated in the driver to a 'unsigned long long' to read/write data? is it required?
3. Is it required to set the f2h_AR[AW]CACHE attributes as you said in the second post?
4. After sending the command to perform the DMA task using the ACP port (phy_addr | 0x80000000) I got a "Kernel panic - not syncing", do you have a repository where I can take a look at the code of your driver when using the ACP?
And the FPGA qsys system.
Also this is the Linux I am using: Linux cyclone5 3.10.31-ltsi-altera# 1 SMP Thu Feb 11 22:06:58 UTC 2016 armv7l GNU/Linux and the DE1-SoC board.
Thanks.