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Hi Sir, I am trying to interface a linux program to a FPGA master using the ACP port, what address do I need to use to ensure read and writes go through the ACP port?
Actually I am not familiar with using the ACP port at all, if you can give me some guide, I will appreciate it.
I configured the AXI port cache settings as you said. Any example or reference where I can find information related to it.
Thanks.
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Hi norxander,
For access to ACP port, my driver code looks like (literally):
dma->csr[2] = c->dma_currimage.write_buf_phys_addr | 0x80000000;
The bit-wise OR was the only trick.
However, I found the ACP speed slow and I gave up on ACP port and used the much faster FPGA-SDRAM ports.
I've heard rumors that ACP port has a design flaw that will be fixed. My notes apply to Cyclone 5 SoC 5CSXFC6D6F31C8ES and you'll find best performance there by using the FPGA-SDRAM ports and using driver calls dma_sync_single_for_device/cpu on buffers shared between FPGA and CPU.
Best wishes
Honored Contributor
