about sdram a/d bus shared

hi all:

In tne altera reference design, the SDRAM not share address/data bus with flash,

sram, lan chip. But in my design I shared sdaram address/data bus with flash to

reduce IO pins. Now I meet a problem. I can run the single program fine without

OS.But when I run uClinux 2.6 os on own board the system will boot fail.The fail

information is CRC erro. However I run the same uClinux 2.6 os on altera cyclone

1c20 dev board, it is work fine.The difference is my design shared the SDRAM a/d

bus with flash.I think maybe the reason is disturb.

Who can give me some advice to solve the question?

Thank a lot!