A Newbie's struggle

Hi ILJ,

> The SDRAM test consists of walking bit tests, byte (DQMn) tests,

> long int address test (with prime number addend), fill zero test, fill ff test....

The II/f has a a data cache & it's always in write-back mode ... so you

must invalidate the memory regions prior to doing your memory read/compare.

Depending on how you designed your tests, it's possible that your tests pass

because you always hit the cache & never actually read the SDRAM.

I've had debugger trouble when my reset address is in faulty SDRAM ... usually

when I didn't have my PLL phase shift set properly.

Regards,

--Scott